A Stacked Segmented Adaptive Power Amplifier in 22nm FD-SOI

Authors :: Aritra Banerjee
Barend Van Liempd
Piet Wambacq
Faculty of Engineering
Laboratorium for Micro- and Photonelectronics
Electronics and Informatics
Source :: IEEE Microwave and Wireless Components Letters. 32:983-986
Publication Year :: 2022
Publisher :: Institute of Electrical and Electronics Engineers (IEEE), 2022.
Abstract: This letter presents a two-stage mm-wave power amplifier (PA) in 22nm fully depleted silicon-on-insulator (FD-SOI) technology. High output power is obtained through transistor stacking. Transistor segmentation and back-gate bias control techniques are used in this adaptive PA which can work in high gain mode (HGM) and high linearity mode (HLM). The proposed PA achieves 17.9 dBm saturated output power ( Psat ), 27.6 dB power gain, 11.6 dBm output 1-dB compression point (OP1dB), and 11.0% peak power-added efficiency (PAE) at 74 GHz in the HGM. In the HLM, 17.1 dBm Psat , 21.2 dB power gain, 14.6 dBm OP1dB, and 12.9% peak PAE are obtained at 74 GHz.