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PipeRench: A Reconfigurable Architecture and Compiler

Authors :
Goldstein, Seth C.
Schmit, Herman
Budiu, Mihai
Srihari Cadambi
Moe, Matt
R. Reed Taylor
Publication Year :
2018
Publisher :
Figshare, 2018.

Abstract

With the proliferation of highly specialized embedded computer systems has come a diversification of workloads for computing devices. General-purpose processors are struggling to efficiently meet these applications' disparate needs, and custom hardware is rarely feasible. According to the authors, reconfigurable computing, which combines the flexibility of general-purpose processors with the efficiency of custom hardware, can provide the alternative. PipeRench and its associated compiler comprise the authors' new architecture for reconfigurable computing. Combined with a traditional digital signal processor, microcontroller or general-purpose processor, PipeRench can support a system's various computing needs without requiring custom hardware. The authors describe the PipeRench architecture and how it solves some of the pre-existing problems with FPGA architectures, such as logic granularity, configuration time, forward compatibility, hard constraints and compilation time

Details

Database :
OpenAIRE
Accession number :
edsair.doi.dedup.....08892519dc89e4d8f051427377d0c30f
Full Text :
https://doi.org/10.1184/r1/6608417.v1