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Robust EOT and effective work function extraction for 14 nm node FDSOI technology

Authors :
Michel Haond
B. Mohamad
Denis Rideau
G. Reimbold
Gerard Ghibaudo
Charles Leroux
Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC )
Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI)
Direction de Recherche Technologique (CEA) (DRT (CEA))
Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)
STMicroelectronics [Crolles] (ST-CROLLES)
ANR-10-LABX-0055,MINOS Lab,Minatec Novel Devices Scaling Laboratory(2010)
European Project: 325633,EC:FP7:SP1-JTI,ENIAC-2012-2,PLACES2BE(2012)
Source :
2016 EUROSOI-ULIS Proceedings, 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Jan 2016, Vienna, Austria. pp.135-138, ⟨10.1109/ULIS.2016.7440071⟩
Publication Year :
2016
Publisher :
HAL CCSD, 2016.

Abstract

session 10: end of Scaling and Beyond CMOS; International audience; Effective work function and equivalent oxide thickness are fundamental parameters for technology optimization. In this work, a comprehensive study is done on a large set of FDSOI devices. The extraction of the gate stack parameters is carried out by fitting experimental CV characteristics to quantum simulation, based on self-consistent solution of one dimensional Poisson and Schrodinger equations. A reliable methodology for gate stack parameters is proposed and validated. This study identifies the process modules that impact directly the effective work function from those that only affect the device threshold voltage, due to the device architecture. Moreover, the relative impacts of various process modules on channel thickness and gate oxide thickness are evidenced.

Details

Language :
English
Database :
OpenAIRE
Journal :
2016 EUROSOI-ULIS Proceedings, 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Jan 2016, Vienna, Austria. pp.135-138, ⟨10.1109/ULIS.2016.7440071⟩
Accession number :
edsair.doi.dedup.....071f76eecd610e4c7827345f6bc8f5a9
Full Text :
https://doi.org/10.1109/ULIS.2016.7440071⟩