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Physical design and assembly process development of a multi-chip package containing a light emitting diode (LED) array die

Authors :
K. Kaskoun
T. Fang
John W. Stafford
B. Lytle
B. Marlin
R. Bonda
G. Swan
G. Tam
Source :
1996 Proceedings 46th Electronic Components and Technology Conference.
Publication Year :
2002
Publisher :
IEEE, 2002.

Abstract

This paper presents the physical design concept and process developments to construct a small module containing a chip with an array of miniature light emitting diodes (LED's) as well as the driver control circuitry for the LED array. The module is composed of a glass substrate consisting of a fanout pattern from the I/O bond pads of the fine pitch solder bumped LED array chip. The fanout I/O pattern of the glass terminates on a 40 mil pitch ball grid array land pattern. The LED array chip is bonded face down on the glass and underencapsulated with an optically transparent underfill. All of the driver board circuitry is on a glob top plastic ball grid array (GTPBGA) package whose solder balls are reflow attached to the assembled glass substrate and underencapsulated to provide a finished display module. To implement the module concept, fine pitch (i.e. 80 /spl mu/m) 90Pb/10Sn solder bump technology, fluxless flip chip bonding, thin optically transparent underencapsulation technology had to be developed, as well as the development of a multi-chip 384 I/O 40 mil pitch glob top plastic ball grid array (GTPBGA). The solder balls on the 384 I/O GTPBGA are 30Pb/70In. The assembly technology and underencapsulation technology for the assembly of the glass substrate containing the LED array chip and the 384 I/O GTPBGA also had to be developed.

Details

Database :
OpenAIRE
Journal :
1996 Proceedings 46th Electronic Components and Technology Conference
Accession number :
edsair.doi.dedup.....062fa4b89f286ef017d6aa3da14bb987
Full Text :
https://doi.org/10.1109/ectc.1996.550810