A 20MHz 15μm pitch 128×128 CTIA ROIC for InGaAs focal plane array

A 128×128 matrix readout integrated circuit (ROIC) for 15×15 μm 2 InGaAs focal plane array (FPA) is reported in this paper. Capacitive-feedback Trans-Impedance Amplifier (CTIA) and correlated double sampling (CDS) are both involved in ROIC pixel which dissipates 90nW and has a full-well-capacity (FWC) of about 78,000 e-. Noises of ROIC pixel are analyzed and distribution method of capacitors in pixel is discussed in order to obtain low-noise performance. In column buffer circuit, a new pre-charging technique is developed to realize readout rate of 20 MHz with low power consumption. The ROIC is fabricated with 0.18-μm 3.3 V mixed signal CMOS process. Test results show that the ROIC has an equivalent input noise of about 181e- and can achieve a readout rate of 20 MHz.