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A Novel Resistance Memory with High Scalability and Nanosecond Switching

Authors :
Akihiro Maesaka
Takeyuki Sone
Naomi Yamada
Keitaro Endo
Shuichiro Yasuda
Kazuhiro Ohba
Hiroaki Narisawa
Tsunenori Shiimoto
Satoshi Sasaki
Tomohito Tsushima
Akira Kouchiyama
Katsuhisa Aratani
Tetsuya Mizuguchi
Source :
2007 IEEE International Electron Devices Meeting.
Publication Year :
2007
Publisher :
IEEE, 2007.

Abstract

We report a novel nonvolatile dual-layered electrolytic resistance memory composed of a conductive Cu ion activated layer and a thin insulator for the first time. An ON/OFF mechanism of this new type memory is postulated as follows: Cu ions pierce through the insulator layer by applied electric field, the ions form a Cu conductive bridge in the insulator layer, and this bridge dissolves back to the ion activated layer when the field is reversed. The 4 kbit memory array with 1T-1R cell structure was fabricated based on 180 nm CMOS process. Set/reset pulses were 5 ns, 110 muA and 1 ns, 125 muA, respectively. Those conditions provide large set/reset resistance ratio of over 2 orders of magnitude and satisfactory retention. Essential characteristics for high capacity memories including superb scalability down to 20 nmphi, sufficient endurance up to 107 cycles and preliminary data for 4-level memory are also presented. These characteristics promise the memory being the next generation high capacity nonvolatile memory even before the scaling limitation of flash memories is encountered.

Details

Database :
OpenAIRE
Journal :
2007 IEEE International Electron Devices Meeting
Accession number :
edsair.doi...........fdfb88351a703004b83a1754c7af4283
Full Text :
https://doi.org/10.1109/iedm.2007.4419064