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Flip-Flop Upsets From Single-Event-Transients in 65 nm Clock Circuits
- Source :
- IEEE Transactions on Nuclear Science. 56:3145-3151
- Publication Year :
- 2009
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 2009.
-
Abstract
- This paper describes upsets of 65 nm flip-flops caused by Single-Event-Transients in clock-tree circuits. The upset rate is predicted through modeling, and compared to upset rates measured on a 65 nm test chip with 15 MeV carbon ions and 148 MeV protons.
- Subjects :
- Physics
Nuclear and High Energy Physics
business.industry
Chip
Upset
law.invention
Ion
Soft error
Atmospheric measurements
Nuclear Energy and Engineering
law
Electronic engineering
Optoelectronics
Electrical and Electronic Engineering
business
Event (particle physics)
Flip-flop
Electronic circuit
Subjects
Details
- ISSN :
- 15581578 and 00189499
- Volume :
- 56
- Database :
- OpenAIRE
- Journal :
- IEEE Transactions on Nuclear Science
- Accession number :
- edsair.doi...........fdf024aaaf6875a906cb2347c6412520