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A Low-Jitter Added SSCG with Seamless Phase Selection and Fast AFC for 3rd Generation Serial-ATA

Authors :
Chi-Won Kim
Jongshin Shin
Ji-Young Kim
Seung-Hee Yang
Myoungbo Kwak
Il-won Seo
Jaehyun Pak
Ghy Boong Hong
Hyun-goo Kim
Source :
CICC
Publication Year :
2006
Publisher :
IEEE, 2006.

Abstract

A low-jitter added 3GHz spread-spectrum clock generator (SSCG) with seamless phase selection and a fast automatic frequency calibration (AFC) was implemented in 90nm CMOS process. The proposed SSCG takes full advantage of multi-phase switching with increased sigma-delta operation speed. Large frequency shift and low jitter addition is obtained without extra phase management logic. A new AFC is also proposed for multi-band LC-VCO used in the SSCG. A fast and high resolution frequency calibration is done with direct counting of high frequency VCO clock. The experimental result shows that only 2.7ps peak-to-peak jitter is added by spread-spectrum clocking (SSC) and 400ns of unit frequency comparison time is achieved in AFC process.

Details

Database :
OpenAIRE
Journal :
IEEE Custom Integrated Circuits Conference 2006
Accession number :
edsair.doi...........fdc5175728607c3eda521e62e077346d