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A statistical study of defect maps of large area VLSI IC's
- Source :
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2:249-256
- Publication Year :
- 1994
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 1994.
-
Abstract
- Defect maps of 57 wafers containing large area VLSI IC's were analyzed in order to find a good match between the empirical distribution of defects and a theoretical model. Our main result is that the commonly employed models, most notably, the large area clustering negative binomial distribution, do not provide a sufficiently good match for these large area IC's. Only the recently proposed medium size clustering model is close enough to the empirical distribution. An even better match can be obtained either by combining two theoretical distributions or by a "censoring" procedure in which the worst chips are ignored. Another goal of the study was to find out whether certain portions of either the chip or the wafer had more defects than the others. >
- Subjects :
- Very-large-scale integration
Engineering
business.industry
Semiconductor device modeling
Negative binomial distribution
Hardware_PERFORMANCEANDRELIABILITY
Chip
Empirical distribution function
Censoring (statistics)
Hardware and Architecture
Statistics
Electrical and Electronic Engineering
business
Cluster analysis
Algorithm
Random variable
Software
Subjects
Details
- ISSN :
- 10638210
- Volume :
- 2
- Database :
- OpenAIRE
- Journal :
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Accession number :
- edsair.doi...........fb279e8bfe5e2a786d96453fa240f153
- Full Text :
- https://doi.org/10.1109/92.285750