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A Small Depth-16 Circuit for the AES S-Box

Authors :
René Peralta
Joan Boyar
Source :
IFIP Advances in Information and Communication Technology ISBN: 9783642304354, SEC
Publication Year :
2012
Publisher :
Springer Berlin Heidelberg, 2012.

Abstract

New techniques for reducing the depth of circuits for cryptographic applications are described. These techniques also keep the number of gates quite small. The result, when applied to the AES S-Box, is a circuit with depth 16 and only 128 gates. For the inverse, it is also depth 16 and has only 127 gates. There is a shared middle part, common to both the S-Box and its inverse, consisting of 63 gates. The best previous comparable design for the AES S-Box has depth 22 and size 148 [12].

Details

ISBN :
978-3-642-30435-4
ISBNs :
9783642304354
Database :
OpenAIRE
Journal :
IFIP Advances in Information and Communication Technology ISBN: 9783642304354, SEC
Accession number :
edsair.doi...........f911be27da5b9b6d5038585d48b47ef2