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A 16-bit resistor string dac with full-calibration at final test

Authors :
Randall L. Geiger
Zhongjun Yu
T. Kuyel
Degang Chen
K. Parthasarathy
Source :
ITC
Publication Year :
2006
Publisher :
IEEE, 2006.

Abstract

A novel, on-chip transfer function calibration scheme is introduced to the classical resistor string DAC architecture. A 16-bit, quad channel, resistor string DAC with exceptional accuracy is fabricated on an ultra-low-cost, 0.5mum, 5V CMOS process. Monotonicity is achieved by voltage interpolation and absolute accuracy errors are improved by 100times using full transfer function calibration at final test. An on-chip arithmetic logic unit (ALU) linearly interpolates calibration coefficients saving memory, and a high-effective-resolution cal-DAC preserves differential linearity (DNL) performance while correcting integral linearity errors. Separate cal-DACs correct for offset and gain errors. Each DAC channel occupies 4mm2 die area, consumes 750muA, and settles in 10mus, while offering up to +/- 500muV absolute accuracy across its transfer curve. The chip has built-in DFT and uses one time programmable memory with read-back. The device can be calibrated and tested with a single insertion at final test. This paper discusses the architecture, testing, calibration and optimization details

Details

Database :
OpenAIRE
Journal :
IEEE International Conference on Test, 2005.
Accession number :
edsair.doi...........f7e0fa5b5909d8bd8180b71b12432e28