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A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips
- Source :
- IEEE Journal of Solid-State Circuits. 56:2817-2831
- Publication Year :
- 2021
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 2021.
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Abstract
- This article presents a computing-in-memory (CIM) structure aimed at improving the energy efficiency of edge devices running multi-bit multiply-and-accumulate (MAC) operations. The proposed scheme includes a 6T SRAM-based CIM (SRAM-CIM) macro capable of: 1) weight-bitwise MAC (WbwMAC) operations to expand the sensing margin and improve the readout accuracy for high-precision MAC operations; 2) a compact 6T local computing cell to perform multiplication with suppressed sensitivity to process variation; 3) an algorithm-adaptive low MAC-aware readout scheme to improve energy efficiency; 4) a bitline header selection scheme to enlarge signal margin; and 5) a small-offset margin-enhanced sense amplifier for robust read operations against process variation. A fabricated 28-nm 64-kb SRAM-CIM macro achieved access times of 4.1–8.4 ns with energy efficiency of 11.5–68.4 TOPS/W, while performing MAC operations with 4- or 8-b input and weight precision.
Details
- ISSN :
- 1558173X and 00189200
- Volume :
- 56
- Database :
- OpenAIRE
- Journal :
- IEEE Journal of Solid-State Circuits
- Accession number :
- edsair.doi...........eec762d8b2cffbcc9800b0ea70d3f913