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A Last-Level Cache Management for Enhancing Endurance of Phase Change Memory
- Source :
- 2021 36th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC).
- Publication Year :
- 2021
- Publisher :
- IEEE, 2021.
-
Abstract
- Since PCM memory has various advantages over DRAM, it is attracting attention as the next-generation memory. However, because of a few drawbacks, such as long write latency and limited write endurance, PCM cannot be used as the conventional system's main memory. This paper proposes the last-level cache (LLC) management algorithm to improve PCM's lifetime by evicting dirty blocks evenly to the PCM. As a result, we achieved 35% longer lifetime improvement without any PCM modification.
Details
- Database :
- OpenAIRE
- Journal :
- 2021 36th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC)
- Accession number :
- edsair.doi...........edc656ecd790d99596b3416ec960e2cf