Heterointegration of III–V on silicon using a crystalline oxide buffer layer

The integration of III–V compound semiconductors with Si can combine the cost advantage and maturity of Si technology with the superior performance of III–V materials. We have achieved the heteroepitaxial growth of III–V compound semiconductors on a crystalline SrTiO 3 buffer layer grown on Si(0 0 1) substrates. A two-step growth process utilizing a high temperature nucleation layer of GaAs, followed by a low-temperature GaAs layer at a higher growth rate was employed to achieve highly crystalline thick GaAs layers on the SrTiO 3 /Si substrates with low surface roughness as seen by AFM. The effect of the GaAs nucleation layer on different surface terminations for the SrTiO 3 layer was studied for both on axis and miscut wafers, which led to the conclusion that the Sr terminated surface on miscut substrates provides the best GaAs films. Using GaAs/STO/Si as virtual substrates, we have optimized the growth of high quality GaSb using the interfacial misfit (IMF) dislocation array technique. This work can lead to the possibility of realizing infrared detectors and next-generation high mobility III–V CMOS within the existing Si substrate infrastructure.