VHDL design and simulation of MAM memory for LAPCAM parallel architecture for image processing

MAM (multi-mode access memory) is a memory that has the characteristics of PSMU (parallel search and multiple update). This new type of memory is applied to LAPCAM (linear array of processors with content addressable memory) architecture for image processing. Using MAM, the global and regional type of image processing algorithms can be developed efficiently. MAM consists of 3 different types of memory i.e. conventional memory (RAM), content addressable memory (CAM), and shift/rotate memory (FIFO). The objectives of the research are focused on the design of MAM memory, implementation of the design in VHDL (VHSIC hardware description language), verification of the design by simulation using software active-HDL and evaluation of the simulation results.