A comprehensive DC/AC model for ultra-fast NBTI in deep EOT scaled HKMG p-MOSFETs

DC and AC NBTI in deep EOT scaled HKMG p-MOSFETs with different IL (scaled to sub 2A) are measured by UF-MSM method with 10μs delay. A model with interface trap generation (ΔV IT-IL ) at Si/IL interface, hole trapping (ΔV HT ) in IL bulk and trap generation (ΔV IT-HK ) linked to H passivated Oxygen vacancy (Ov-H) defects in IL/HK interfacial transition layer has been proposed. The existence of Ov defects and their energy levels are verified using DFT simulation. The model can successfully predict V T shift (ΔV T ) during and after DC stress, dependence on pulse duty cycle (PDC) and frequency (f) for AC stress, and gate insulator process dependence with consistent set of parameters. Impact of EOT scaling on DC and AC NBTI is studied, and end-of-life degradation has been estimated.