Back to Search Start Over

VLSI Implementation of a High Speed and Area efficient N-bit Digital CMOS Comparator

Authors :
S. Karunakaran
K. Pavan
P. Rahul Reddy
Source :
2021 Second International Conference on Smart Technologies in Computing, Electrical and Electronics (ICSTCEE).
Publication Year :
2021
Publisher :
IEEE, 2021.

Details

Database :
OpenAIRE
Journal :
2021 Second International Conference on Smart Technologies in Computing, Electrical and Electronics (ICSTCEE)
Accession number :
edsair.doi...........e01a29896911c04362715e4db4d6d08d
Full Text :
https://doi.org/10.1109/icstcee54422.2021.9708574
Full Text Access
View/download PDF

Tools

Authors Abstract Subjects Details