Lateral solid phase epitaxy of amorphously grown Si1−xGex layers on SiO2/Si(100) substrates using in-situ RPCVD postannealing

Lateral solid phase epitaxy (L-SPE) in non-doped or in-situ B-doped amorphous- (a-) SiGe deposited on SiO 2 patterned Si(100) wafers by in-situ postannealing in reduced pressure chemical vapor deposition system was investigated for possible heterojunction bipolar transistor (HBT) base link resistivity improvement. Using Si 2 H 6 as Si precursor gas, an epitaxial and amorphous layer was grown on the mask window and on the SiO 2 area, respectively. By inserting a-Si buffer underneath, the deposited a-SiGe surface became smoother. After the L-SPE process, an improved L-SPE length was observed due to suppressed random nucleation on SiO 2 . The L-SPE length increased with increasing postannealing time and saturated due to random poly-grain formation on the SiO 2 . At the same L-SPE time, increased L-SPE length was observed at higher temperature and at higher Ge concentration. With increasing B concentration in the a-SiGe, the L-SPE length firstly increased. However, after reaching 2 × 10 19 atom/cm 3 , the L-SPE length reduced again down to the undoped case. These results of L-SPE process might have potential to improve dynamic performance of SiGe HBT by reducing the base link resistivity by widening the monocrystalline region around bipolar window.