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Implementation of memory stacking on logic controller by using 3DIC 300mm backside TSV process integration

Authors :
Shang-Chun Chen
Tzu-Chien Hsu
Chau-Jie Zhan
Jui-Chm Chen
Yu-Chen Hsm
Chia-Hsin Lee
Yung-Fa Chou
Chung-Chih Wang
Ding-Ming Kwai
Wei-Chung Lo
Tzu-Kun Ku
Tsuen-Sung Chen
Po-Chih Chang
Pei-Jer Tzeng
Hsiang-Hung Chang
Pei-Hua Wang
Yiu-Hsiang Chang
Source :
2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).
Publication Year :
2016
Publisher :
IEEE, 2016.

Abstract

Technologies of backside via-last TSV (BTSV) 3DIC 300mm process integration are developed to be applied in industry cooperation and mass production business model view. In this work, a successful BTSV process integration is disclosed and applied on 65nm logic controller/45nm DRAM stacking structure. Key enabling process technologies in BTSV formation and thin wafer handling are discussed. The electrical measurement data and functional logic circuit test show the practicability of BTSV integration.

Details

Database :
OpenAIRE
Journal :
2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
Accession number :
edsair.doi...........d926072c3831fcc4e2c6ec8d4ee19f8d