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Integrated memory array processor and real-time vision system for vehicle control

Authors :
Y. Fujita
Toru Ikeda
S. Okazaki
Source :
Proceedings of VNIS'94 - 1994 Vehicle Navigation and Information Systems Conference.
Publication Year :
2002
Publisher :
IEEE, 2002.

Abstract

This paper describes the integrated memory array processor architecture (IMAP), which enables high-speed image processing in compact implementation, and its application to real-time image processing for vision-based vehicle control and traffic surveillance systems. IMAP integrates three fundamental functions for image processing, i.e. a large capacity image memory, a processing array and input/output shift registers. The prototype LSI integrates eight 8-bit processors and a 144 Kbit SRAM on a single chip, where the processors operates in SIMD manner at 200 MIPS (25 MHz). Since the on-chip image memory can be accessed by external devices independently of the internal processing, the prototype LSI can be used as an intelligent VRAM. The real-time vision system (RVS) has been developed by using 64 prototype LSIs connected in series. The RVS is a 512-processor SIMD system whose peak performance reaches 7.7 GIPS at 15 MHz clock. RVS performance is also shown in basic low-level image processings which are useful for vision-based vehicle control and traffic surveillance systems. RVS executes most of them in about one millisecond. >

Details

Database :
OpenAIRE
Journal :
Proceedings of VNIS'94 - 1994 Vehicle Navigation and Information Systems Conference
Accession number :
edsair.doi...........d414b0997b72f3fa13d93f95204af75b
Full Text :
https://doi.org/10.1109/vnis.1994.396857