Device Performance Evaluation of PMOS Devices Fabricated by B2H6PIII/PLAD Process on Poly-Si Gate Doping

It has been shown that the PIII/PLAD poly-Si gate doping process offers unique advantages over conventional beam line systems, including system simplification, lower cost, higher throughput, and device performance equivalence or improvement. PMOS devices fabricated by a B 2 H 6 /H 2 PIII/PLAD process on P+poly-gate doping are intensively evaluated in this paper. In addition to higher throughput, PMOS devices fabricated by a PLAD process showed an equivalent electrical performance to those fabricated by conventional beam line ion implantation, including similar poly-Si gate resistance and depletion, threshold and sub-threshold characteristics, drive current, and gate-oxide integrity.