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Quality Obfuscation for Error-Tolerant and Adaptive Hardware IP Protection

Authors :
Domenic Forte
Tamzidul Hoque
Abdulrahman Alaql
Swarup Bhunia
Source :
VTS
Publication Year :
2019
Publisher :
IEEE, 2019.

Abstract

Ahstract-Various attacks on hardware intellectual properties (IPs) have been successful in obtaining design information that can be used to reverse engineer a system, create counterfeits, or insert hardware Trojans. Key-based hardware obfuscation is an attractive solution that helps prevent such attacks. In this paper, for the first time, we propose a key error tolerant obfuscation approach that achieves graceful degradation in output Quality of Service (QoS) as the bit error rate (BER) in obfuscation key increases. The approach, which we refer to it as, “Quality Obfuscation”, is applicable to a large variety of IPs, including digital signal processing (DSP) and approximating computing IPs, which are resilient to output QoS degradation. We present a complete obfuscation framework that can be adapted to any error tolerance rate. To demonstrate its robustness, we obfuscate several common DSP IP blocks and observe the performance under various percentages of bit-flips in the key. We show that our approach provides controllability of system quality, as well as the strong protection at low overhead, e.g., average 15% area and 5.9% power overhead to tolerate 10% BER.

Details

Database :
OpenAIRE
Journal :
2019 IEEE 37th VLSI Test Symposium (VTS)
Accession number :
edsair.doi...........cdc52cda18ad2d8baf56e7543461f3ac
Full Text :
https://doi.org/10.1109/vts.2019.8758637