Back to Search Start Over

High performance PMOS with strained high-Ge-content SiGe fins for advanced logic applications

Authors :
Vijay Narayanan
Kam-Leung Lee
Pouya Hashemi
Takashi Ando
John A. Ott
Sebastian Engelmann
Renee T. Mo
Siyuranga O. Koswatta
John Bruley
Karthik Balakrishnan
Effendi Leobandung
Kevin K. Chan
Source :
2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).
Publication Year :
2017
Publisher :
IEEE, 2017.

Abstract

FinFETs with strained-SiGe channel have recently drawn significant attention due to their built in uniaxial strain, higher mobility and better reliability over conventional Si FETs. Research on pure Ge has been the major focus of many institutes over the past few years. However, with high-Ge-content (HGC) SiGe one can benefit from competitive or better performance over pure Ge and overcome the thermal budget constraints required for Ge. In this paper, we briefly review our latest advancements in high-Ge-content strained-SiGe FinFETs featuring gate first and Replacement HK/MG (RMG) flows with record mobility and short-channel performance to extend the roadmap for advanced FinFET and FDSOI generations.

Details

Database :
OpenAIRE
Journal :
2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)
Accession number :
edsair.doi...........cd3fd03c0ec14fa74789a5cbbb75dd86
Full Text :
https://doi.org/10.1109/vlsi-tsa.2017.7942468