Low-Noise and High-Frequency 0.10μm body-tied SOI-CMOS Technology with High-Resistivity Substrate for Low-Power 10Gbps Network LSI

Authors :: Tatsuhiko Ikeda
Masahide Inuishi
Shigeto Maegawa
Harufusa Kondoh
Daniel Chen
Yasuo Inoue
Toshiaki Iwamatsu
Yuzuru Ohji
Tsutomu Yoshimura
Yuuichi Hirano
Takashi Ipposhi
Toshihide Oka
Hiroyuki Takashino
Takuji Matsumoto
Mikio Tujiuchi
Source :: Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials.
Publication Year :: 2003
Publisher :: The Japan Society of Applied Physics, 2003.

Subjects :: High resistivity
Materials science
business.industry
Soi cmos technology
Optoelectronics
Substrate (printing)
business
Low noise
Power (physics)

Database :: OpenAIRE
Journal :: Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials
Accession number :: edsair.doi...........ccc46b33f6123a9a6811c514074703ba

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