Design of a New Kind of LDPC Decoder

The properties of the LDPC (Low-Density Parity-Check) error-correcting codes are bearing down on Shannon limit, but it also needs to solve the problem of reducing the complexity of decoding as much as possible in practical applications. A new type of (1008, 3, 6) rules LDPC decoder was introduced in this paper. It adopted the Min-Sum-Plus-Correction-Factor decoding algorithm and part parallel structure, which not only reduced the complexity of the hardware realization, but also improved the decoding speed. The maximum decoding rate could achieve 128Mbit/s. These properties laid a good foundation for the actual application of LDPC. Keywords-LDPCt; decoder;MSPCF;FPGA