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Microprocessor Processes and Devices in Post Exascale Computing Era
- Source :
- 2021 IEEE 2nd International Conference on Big Data, Artificial Intelligence and Internet of Things Engineering (ICBAIE).
- Publication Year :
- 2021
- Publisher :
- IEEE, 2021.
-
Abstract
- The physical limit of traditional CMOS process is approaching, and the progress of processes and devices has become the key problem to the development of microprocessor technology in the post exascale computing era. In this paper, the traditional CMOS process, packaging process and new principle devices are prospected, and the current situation and development prospect of various processes and devices are analyzed. Firstly, the development trend of CMOS process in transistor structure, integration and power consumption is analyzed; Secondly, 3D packaging, 2.5D packaging, chiplet, thruchip interface and wafer scale integration technologies are analyzed; Finally, the negative capacitance transistors, tunneling transistors, two-dimensional semiconductor transistors, carbon nanotube transistors and compute-in-memory technologies using phase change memory and resistive memory are analyzed.
- Subjects :
- 010302 applied physics
Wafer-scale integration
business.industry
Computer science
Interface (computing)
Transistor
Electrical engineering
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
021001 nanoscience & nanotechnology
01 natural sciences
Exascale computing
Resistive random-access memory
law.invention
Carbon nanotube field-effect transistor
Phase-change memory
Microprocessor
Hardware_GENERAL
law
0103 physical sciences
Hardware_INTEGRATEDCIRCUITS
0210 nano-technology
business
Hardware_LOGICDESIGN
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2021 IEEE 2nd International Conference on Big Data, Artificial Intelligence and Internet of Things Engineering (ICBAIE)
- Accession number :
- edsair.doi...........c7f896e751d2c35dff903eea388cfc4a