Threshold Voltage Control of Hf-based High-κ Gate Stack System by Fluorine Incorporation into Channel and Its Impact on Short-Channel Characteristics

A threshold voltage lowering of up to 400 mV in HfSiON/polycrystalline silicon (poly-Si) gate stack p-type metal–oxide–semiconductor field effect transistors (pMOSFETs) by fluorine incorporation into the channel is observed. Physical analysis verifies that implanted fluorine exists only in the channel region. The characteristics of the short-channel devices are investigated in detail, and an acceptor generation model by fluorine implantation is proposed. The model successfully explains the characteristics of fluorine-incorporated short-channel pMOSFETs.