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Characterization of inversion-layer capacitance of holes in Si MOSFET's
- Source :
- IEEE Transactions on Electron Devices. 46:1446-1450
- Publication Year :
- 1999
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 1999.
-
Abstract
- Inversion-layer capacitance (C/sub inv/) in p-channel Si MOSFET's is studied experimentally and theoretically with emphasis on the surface carrier concentration (N/sub s/) dependence, which is important in the quantitative description and the physical understanding. The amount of C/sub inv/ and its influence on the gate capacitance are compared between electron and hole inversion layers. It is experimentally verified that, under same physical thickness of gate oxides, the electrical gate oxide thickness, determined from the gate capacitance, is larger for inversion-layer holes than that for inversion-layer electrons, because of smaller values of C/sub inv/ for inversion-layer holes. Self-consistent Poisson-Schrodinger calculation of C/sub inv/ is performed on basis of the approximation of a constant effective mass and is compared with the experimental C/sub inv/. It is found that the calculation using the effective masses at the valence band edge can accurately represent the experimental results over a whole range of N/sub s/.
- Subjects :
- Materials science
Silicon
Condensed matter physics
Analytical chemistry
chemistry.chemical_element
Electron
Capacitance
Electronic, Optical and Magnetic Materials
Effective mass (solid-state physics)
chemistry
Gate oxide
MOSFET
Valence band
Electrical and Electronic Engineering
Gate capacitance
Subjects
Details
- ISSN :
- 00189383
- Volume :
- 46
- Database :
- OpenAIRE
- Journal :
- IEEE Transactions on Electron Devices
- Accession number :
- edsair.doi...........c5043a959c0a30b8bb35c129be6ebcd1
- Full Text :
- https://doi.org/10.1109/16.772489