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Effect of Channel Width Shortening on the Stability of a-Si:H/nc-Si:H Bilayer Thin-Film Transistors

Authors :
G. Kamarinos
M. Oudwan
Ilias Pappas
François Templier
Stylianos Siskos
Charalabos A. Dimitriadis
Source :
IEEE Electron Device Letters. 29:873-875
Publication Year :
2008
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2008.

Abstract

The static bias-stress-induced degradation of hydrogenated amorphous/nanocrystalline silicon bilayer bottom-gate thin-film transistors is investigated by monitoring the turn-on voltage (V on) and on-state current (I on) in the linear region of operation. Devices of constant channel length 10 mum and channel width varying from 3 to 400 mum are compared. The experimental results demonstrate that the device degradation is channel-width dependent. In wide channel devices, substantial degradation of V on is observed, attributed to electron injection into the gate dielectric, followed by I on reduction due to carrier scattering by the stress-induced gate insulator trapped charge. With shrinking the channel width down to 3 mum, the device stability is substantially improved due to the possible reduction of the electron thermal velocity during stress or due to the gate insulator quality uniformity over small dimensions.

Details

ISSN :
07413106
Volume :
29
Database :
OpenAIRE
Journal :
IEEE Electron Device Letters
Accession number :
edsair.doi...........be791b12eb46c71468109a1ada97d9fb