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Microstructure and reliability of hybrid interconnects by Au stud bump with Sn-0.7Cu solder for flip chip power device packaging

Authors :
Mingyu Li
Jiao Wang
Hongjun Ji
Source :
Microelectronics Reliability. 66:134-142
Publication Year :
2016
Publisher :
Elsevier BV, 2016.

Abstract

With miniaturization of the interconnect solder bumps, high current density causes serious reliability issues (stress, electromigration etc.) in electronic packages. Through Au stud bumping on the chips and following reflow of solder to produce hybrid interconnects, the eletromigration resistance may be improved by the intermetallics formed inside them due to their barrier effects on the atoms migration. Here, microstructures and reliabilities of Au stud with serial amounts of Sn-0.7Cu solder paste were studied through controlling size of stencil printing aperture. After reflow, AuSn, AuSn2 and AuSn4 formed from the surface of Au stud bump to the solder. A layer of (Cu,Au)6Sn5 with thickness of 3 μm existed at the interface near the Cu substrate with a scallop shape similar to Cu6Sn5. The fraction of intermetallics to the mixed joints varied with the solder amount. Shear strength decreased slightly when comparing with the sole solder joint due to large amounts of brittle intermetallics. Thermal aging resulted in many Kirkendall voids generated at the interfaces of Au stud and the solder, which further decreased the shear strength. The effect of solder amount on microstructural evolution and fracture modes was discussed. The hybrid interconnects showed a good electromigration resistance.

Details

ISSN :
00262714
Volume :
66
Database :
OpenAIRE
Journal :
Microelectronics Reliability
Accession number :
edsair.doi...........b838e37945c9bc4d04197ed0457d839c