MUX Based Flash ADC for Reduction in Number of Comparators

A conventional N-bit flash analog to digital converter has been required the 2N number of resistors and 2N-1 number of preamplifiers as well as comparators. In this proposed work, a number of comparators could be reduced by introducing the multiplexer (MUX). This proposed work has only required the (2^(N-2) + 1) number of comparators. For 6-bit resolution, MUX based flash ADC requires a reduced number of comparators by 73%, respectively, compared with the traditional flash ADC. This proposed 6-bit ADC consists of a reference ladder circuit, a (2x1) multiplexer, 8 (4x1) multiplexer, 17 comparators and thermometer to binary encoder. The proposed 6-bit 200 MSPS ADC is designed and simulated in cadence tools with 1 V supply voltage using 90nm CMOS technology. The proposed work results into effective number of bits (ENOB) of 5.69 bit and figure of merit (FOM) of 0.019 pJ/conversion-step for 200 MS/s.