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Coherency Hub Design for Multi-socket Sun Servers with CoolThreads (TM) Technology
- Source :
- IEEE Micro. :1-1
- Publication Year :
- 2017
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 2017.
-
Abstract
- This paper describes the micro-architecture of a Coherency Hub (CoHub) ASIC for a 4-socket highly-threaded multiprocessor using Sun's UltraSPARC ¯ T2 Plus processor. UltraSPARC T2 Plus is an 8-core CMT processor in the Sun Servers with CoolThreadsTM Technology family. CoHub enables cost-effective scaling to 4 nodes with a total thread count of 256 and near-linear performance scaling on transaction processing workloads. Extending a 2-node "glueless" system to a 4-node system without processor changes was a key requirement. CoHub broadcasts snoop requests, serializes requests to the same address, and consolidates snoop responses. It communicates with nodes via serial links, using a proprietary link layer implemented over FBDIMM. We present the coherency scheme, ASIC design, transaction flows, and engineering challenges created by 800 MHz operation and 6-stage pipeline budget. We report performance scalability results measured on commercial server benchmarks.
- Subjects :
- UltraSPARC
Transaction processing
Computer science
Multiprocessing
02 engineering and technology
computer.software_genre
Pipeline (software)
020202 computer hardware & architecture
UltraSPARC T2
Hardware and Architecture
Server
Scalability
0202 electrical engineering, electronic engineering, information engineering
Operating system
Electrical and Electronic Engineering
computer
Database transaction
Software
Subjects
Details
- ISSN :
- 02721732
- Database :
- OpenAIRE
- Journal :
- IEEE Micro
- Accession number :
- edsair.doi...........b632bddce6841a6ece9dcafd072f17c5