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P-3: Analysis of Poly-Si TFTs' Degradation Behavior Induced by DC Stress

Authors :
HoChul Kang
Kyoung Moon Lim
In-Jae Chung
Eugene Kim
Soo‐Jeong Park
Seok Woo Lee
Kum Mi Oh
Chang-Dong Kim
Source :
SID Symposium Digest of Technical Papers. 36:232
Publication Year :
2005
Publisher :
Wiley, 2005.

Abstract

DC stress induced degradation was compared between LTPS short channel LDD NMOSFETs and PMOSFETs with a dimension of W/L = 3/3 μm/μm by degradation mapping of device parameters. Asymmetric degradation phenomena were classified for different type of devices and compared with respect to applied bias and power.

Subjects

Subjects :
Stress (mechanics)
Materials science
business.industry
Stress induced
Electronic engineering
Optoelectronics
Degradation (geology)
business
Device parameters

Details

ISSN :
0097966X
Volume :
36
Database :
OpenAIRE
Journal :
SID Symposium Digest of Technical Papers
Accession number :
edsair.doi...........b1b6fddc12b594757fb40aa99cdd84b5
Full Text :
https://doi.org/10.1889/1.2036411
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