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Improving gate oxide integrity in p/sup +/pMOSFET by using large grain size polysilicon gate
- Source :
- Proceedings of IEEE International Electron Devices Meeting.
- Publication Year :
- 2002
- Publisher :
- IEEE, 2002.
-
Abstract
- The effect of polysilicon grain size on the gate oxide integrity in p/sup +/pMOS devices was investigated by measuring the electrical characteristics of a MOS capacitor. Good gate oxide integrity was never obtained when using conventional polysilicon with a small (/spl sim/0.05 /spl mu/m) grain size. We report for the first time use of large (/spl sim/1.0 /spl mu/m) grain size polysilicon to solve this problem for gate oxide quality. Additionally, in large-grain-size polysilicon, the efficiency of boron activation was increased and boron diffusion through the gate oxide into the channel region was strongly suppressed. >
- Subjects :
- Materials science
Silicon
business.industry
Polysilicon depletion effect
Gate dielectric
Electrical engineering
chemistry.chemical_element
Time-dependent gate oxide breakdown
Hardware_PERFORMANCEANDRELIABILITY
Grain size
PMOS logic
chemistry
Gate oxide
Hardware_INTEGRATEDCIRCUITS
Optoelectronics
business
Metal gate
Hardware_LOGICDESIGN
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- Proceedings of IEEE International Electron Devices Meeting
- Accession number :
- edsair.doi...........b01b22b93d2606c9bb0f944bc7456926