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A reconfigurable WSI massively data-parallel processing device for cost-effective 3D sensor data processing

Authors :
R.M. Lea
M. Covic
P.T. Tetnowski
Source :
DFT
Publication Year :
2002
Publisher :
IEEE Comput. Soc, 2002.

Abstract

A performance-scalable ISDP (Interactive Sensor Data Processing) workstation, accelerated with commercial PCI multiprocessor cards, is described and a WSI massively data-parallel processor (MdPP) device is proposed for the replacement of its VLSI processors. Delivering 60 GOPS for 16-bit integer multiply-accumulate operations, a WSI-FPGA implementation of the reconfigurable device is shown to be better suited to ISDP applications and at least two orders-of-magnitude more cost-effective.

Details

Database :
OpenAIRE
Journal :
Proceedings IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Accession number :
edsair.doi...........af278c1922ee90b93aab554961295757