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A high speed programming scheme for multi-level NAND flash memory
- Source :
- 1996 Symposium on VLSI Circuits. Digest of Technical Papers.
- Publication Year :
- 2002
- Publisher :
- Widerkehr & Associates, 2002.
-
Abstract
- A new scheme for page programming of multi-level NAND flash memory has been developed. It maintains the 528 byte page size of 32 Mb NAND flash memories with a high throughput of 0.5 MB/s. The circuitry has been successfully implemented into an experimental 128 Mb multi-level flash memory.
Details
- Database :
- OpenAIRE
- Journal :
- 1996 Symposium on VLSI Circuits. Digest of Technical Papers
- Accession number :
- edsair.doi...........acdad5d79b975afc8a623d9af6ac4491
- Full Text :
- https://doi.org/10.1109/vlsic.1996.507758