3D Simulation of Heavy-Ion Induced Charge Collection in Sub-100nm MOS-FETs Using Strained Silicon-Germanium

Single event transient of a PMOS using strained Silicon-Germanium in a sub-100nm bulk process is studied by 3D TCAD simulation. The impact of bias voltage, temperature, LET, and struck position on SET is considered. Our simulation results demonstrate that bias voltage in the range 0.8 to 1.2V greatly influence the amplitude of SET current. Temperature has a stronger influence on a SiGe channel PMOS than a Si-channel PMOS. Both SET current duration and total collection charge increase as LET increases, and SET current duration and total collection of a SiGe channel PMOS are larger than that of Si channel PMOS. These simulation results are beneficial to the space application of SiGe circuits.