A Novel Tunnel FET Design Through Adaptive Bandgap Engineering With Constant Sub-Threshold Slope Over 5 Decades of Current and High $\text{I}_{\mathrm {ON}}/\text{I}_{\mathrm {OFF}}$ Ratio

In this letter, a novel hetero-stacked TFET (HS-TFET) is experimentally demonstrated and optimized for the first time, which can effectively suppress the sub-threshold slope (SS) degradation without leakage current increase through self-adaptively current replenishing with bandgap engineering, greatly alleviating the critical issue of high average SS in conventional TFETs. Based on CMOS-compatible technology, the fabricated HS-TFETs of vertically stacked Si-Si1–xGex source can experimentally achieve superior performance with nearly constant SS over five decades of drain current, high $I_{{{\mathrm{\scriptscriptstyle ON}}}}$ ( $\sim 14\mu \text{A}/\mu \text{m}$ @ $V_{\mathrm {DS}}=-1$ V), and large $I_{{{\mathrm{\scriptscriptstyle ON}}}}/I_{{{\mathrm{\scriptscriptstyle OFF}}}}$ ratio ( $\sim 10^{7})$ . The proposed device with high process compatibility shows great potentials for future ultra-low power applications.