VLSI architecture for high-speed image reconstruction: considerations for a fixed-point architecture

MLA

E. Shieh, et al. “VLSI Architecture for High-Speed Image Reconstruction: Considerations for a Fixed-Point Architecture.” Parallel Architectures for Image Processing, July 1990. EBSCOhost, https://doi.org/10.1117/12.19564.

APA

E. Shieh, Paul J. Hurst, K.W. Current, Gary E. Ford, Stephen G. Azevedo, & I. Agi. (1990). VLSI architecture for high-speed image reconstruction: considerations for a fixed-point architecture. Parallel Architectures for Image Processing. https://doi.org/10.1117/12.19564

Chicago

E. Shieh, Paul J. Hurst, K.W. Current, Gary E. Ford, Stephen G. Azevedo, and I. Agi. 1990. “VLSI Architecture for High-Speed Image Reconstruction: Considerations for a Fixed-Point Architecture.” Parallel Architectures for Image Processing, July. doi:10.1117/12.19564.