High-performance logic and high-gain analog CMOS transistors formed by a shadow-mask technique with a single implant step

Transistors have been fabricated with a photoresist mask placed in close proximity to the gate so as to effectively block the angled halo implant from the gate region. Devices for which the halo has been eliminated demonstrate superior drain conductance, while devices with the halo implant show the short-channel effect required for high performance. Asymmetric devices have also been fabricated in a similar manner, producing devices with improved analog characteristics without an additional masking layer.