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A novel approach to generate self-aligned Ge/SiO2/SiGe gate-stacking structures in a single fabrication step

Authors :
Pei-Wen Li
Thomas George
Po-Hsiang Liao
Ting-Chia Hsu
Kuo-Ching Yang
Wei-Ting Lai
Source :
2014 Silicon Nanoelectronics Workshop (SNW).
Publication Year :
2014
Publisher :
IEEE, 2014.

Abstract

We demonstrated a novel, self-aligned gate-stack heterostructure of Ge-quantum dot (QD)/SiO 2 /SiGe-shell on Si with superior interfacial properties in a single step of selective oxidation of a SiGe pillar over a Si 3 N 4 buffer layer on Si substrate. Ge metal-oxide-semiconductor (MOS) capacitors exhibit a quite low interface trap density on the order of 1011 cm−2eV−1, and Ge n-MOSFETs show good turn on and off features with a subthreshld slope of 175 mV/dec and I on /I off > 106.

Details

Database :
OpenAIRE
Journal :
2014 Silicon Nanoelectronics Workshop (SNW)
Accession number :
edsair.doi...........a39a9b4b77d3eefe965aaa7978a6b597
Full Text :
https://doi.org/10.1109/snw.2014.7348582