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MVPA: An FPGA based multi-vector processor architecture

Authors :
Oscar Palomar
Tassadaq Hussain
Eduard Ayguadé
Amna Haider
Adrian Cristal
Source :
2016 13th International Bhurban Conference on Applied Sciences and Technology (IBCAST).
Publication Year :
2016
Publisher :
IEEE, 2016.

Abstract

With the increase in FPGA density and performance, the demand for multiple high-performance computing (HPC) units has been increased for various scientific and technological fields. Multi-scalar processor architectures do not give the best performance on FPGAs for HPC applications. This performance degradation demands a parameterizable high-performance processor architecture to process HPC applications. In this article, we proposed an FPGA based Multi-Vector Processor Architecture by integrating an efficient scheduler into existing Programmable Vector Memory Controller (PVMC). The proposed design is known as Multi-Vector Processor Architecture (MVPA) which proficiently handles multiple vectorized tasks and their data movements. The system is tested on n Altera FPGA DE4 development board. The MVPA system results are compared with a generic Multi-Vector Processor and multi-scalar core systems. The results show that the MVPA system handles computation task more efficiently and improves system performance between 8.1x to 30.1x and 1.99x to 4.31x against scalar multi-core and generic Multi-Vector Processor systems respectively for 10 applications.

Details

Database :
OpenAIRE
Journal :
2016 13th International Bhurban Conference on Applied Sciences and Technology (IBCAST)
Accession number :
edsair.doi...........a23e0416e482528dc15bb0ca52af9b16
Full Text :
https://doi.org/10.1109/ibcast.2016.7429879