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Voltage polarity effects in GST-based phase change memory: Physical origins and implications

Authors :
Alvaro Padilla
R. S. Shenoy
P. M. Rice
Robert M. Shelby
Teya Topuria
Andrew J. Kellock
Kailash Gopalakrishnan
Bryan L. Jackson
Charles T. Rettner
B. N. Kurdi
Geoffrey W. Burr
Anthony Debunne
Diego G. Dupouy
Kumar Virwani
Source :
2010 International Electron Devices Meeting.
Publication Year :
2010
Publisher :
IEEE, 2010.

Abstract

We show that bias polarity can greatly accelerate device failure in GST- based (GeSbTe) PCM devices, and trace this effect to elemental segregation, initially driven by bias across the melt but then enhanced during the crystallization process. Implications include device, pulse, and materials design for high endurance.

Details

Database :
OpenAIRE
Journal :
2010 International Electron Devices Meeting
Accession number :
edsair.doi...........a16585c7af70c91730979cbd751b9e25
Full Text :
https://doi.org/10.1109/iedm.2010.5703444