Back to Search
Start Over
29.3 Non-Magnetic 0.18µm SOI Circulator with Multi-Watt Power Handling Based on Switched-Capacitor Clock Boosting
- Source :
- ISSCC
- Publication Year :
- 2020
- Publisher :
- IEEE, 2020.
-
Abstract
- There has been significant recent progress in the implementation of integrated non-reciprocal components based on linear periodically-time-varying (LPTV) circuits [1], [5]. Nevertheless, integrated circulators still require a leap forward in power handling, clock power consumption, insertion loss (IL), and chip area to become compelling when compared with ferrite circulators or integrated reciprocal alternatives, such as the electrical-balance duplexer (EBD) [6]. This paper introduces three innovations - (i) a switched-capacitor clock-boosting scheme, (ii) high-Bragg-frequency quasi-distributed T-lines based on periodically loaded inductors, and (iii) a gyrator based on switched partially reflecting T-lines - that enable such a leap for integrated circulators and for LPTV circuits more broadly. These are showcased in a 1GHz 0.18µm SOI CMOS circulator that exhibits 2.1/2.6dB TX-ANT/ANT-RX IL (0.3dB better than prior art [4]), +34dBm TX-ANT P1dB (2.5x or 4dB better), and 40% lower chip area, all at 39mW power consumption (4.4x lower).
- Subjects :
- business.industry
Computer science
020208 electrical & electronic engineering
Circulator
Electrical engineering
Silicon on insulator
02 engineering and technology
Switched capacitor
Inductor
law.invention
Gyrator
Capacitor
Duplexer
law
0202 electrical engineering, electronic engineering, information engineering
Insertion loss
business
Electronic circuit
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2020 IEEE International Solid- State Circuits Conference - (ISSCC)
- Accession number :
- edsair.doi...........989c495d8ab8ad62f045369757f1cf99