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Design and Optimization of 6nm Finfet Tunneling Effect under Overlap and Underlap Condition
- Source :
- 2019 4th International Conference on Information Systems and Computer Networks (ISCON).
- Publication Year :
- 2019
- Publisher :
- IEEE, 2019.
-
Abstract
- FinFET is a type of multi-gate Metal Oxide Semiconductor Field Effect Transistor where gate covers around the slim tri-gate FinFET [1]. Since the channels are completely surrounded by the gate, the overall inversion layer is larger, which results more drain current. It can be optimized with multiple fins. This structure also characterize very little leakage current flow through the body when the transistor is in OFF state and therefore results in optimized performance and low static power.
- Subjects :
- Materials science
business.industry
020208 electrical & electronic engineering
Transistor
020206 networking & telecommunications
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
law.invention
Oxide semiconductor
law
Hardware_INTEGRATEDCIRCUITS
0202 electrical engineering, electronic engineering, information engineering
Optoelectronics
Field-effect transistor
Drain current
business
Quantum tunnelling
Hardware_LOGICDESIGN
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2019 4th International Conference on Information Systems and Computer Networks (ISCON)
- Accession number :
- edsair.doi...........962c793be9d7b430d3d1eefeb8450274
- Full Text :
- https://doi.org/10.1109/iscon47742.2019.9036230