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Simulation of oxide trapping noise in submicron n-channel MOSFETs
- Source :
- IEEE Transactions on Electron Devices. 50:846-852
- Publication Year :
- 2003
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 2003.
-
Abstract
- Carrier trapping via tunneling into the gate oxide was implemented into a partial differential equation-based semiconductor device simulator to analyze the 1/f-like noise in silicon MOSFETs. Local noise sources are calculated using the carrier tunneling rates between trap centers in the oxide and those at the interface. Using the Green's transfer function approach, noise contributions from each node in the oxide mesh to the overall noise at the specified contact terminals are simulated. Unlike traditional 1/f noise analyses in MOSFETs, the simulator is capable of simulating noise for a wide range of bias voltages and device structures. The simulation results show that for an uniformly doped channel, the region in the oxide above the pinch-off point in saturation is most critical for low frequency noise generation while for a graded channel device the source side of the gate oxide region becomes important. By comparing the simulation results with the measured noise data, the oxide defect density in the noise producing regions can be profiled.
- Subjects :
- Materials science
business.industry
Shot noise
Oxide
Y-factor
Time-dependent gate oxide breakdown
Electronic, Optical and Magnetic Materials
Condensed Matter::Materials Science
chemistry.chemical_compound
Noise generator
chemistry
Gate oxide
MOSFET
Electronic engineering
Optoelectronics
Flicker noise
Electrical and Electronic Engineering
business
Subjects
Details
- ISSN :
- 00189383
- Volume :
- 50
- Database :
- OpenAIRE
- Journal :
- IEEE Transactions on Electron Devices
- Accession number :
- edsair.doi...........959e5ccca93f361991e973f0ac927951