Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology

This paper presents an IEEE 802.11n Low-Density Parity-Check (LDPC) decoder implemented in 28nm Ultra-Thin Body and BOX Fully Depleted SOI (UTBB FDSOI), and demonstrates the performance gains of this circuit vs. 28nm LP high-κ metal-gate CMOS bulk technology. It also introduces extended body bias (BB) design techniques to take advantage of specific features of the UTBB technology to overcome the +/-300mV BB range limitation of conventional bulk technologies [1].