Considerations for efficient contact resistivity reduction via Fermi Level depinning - impact of MIS contacts on 10nm node nMOSFET DC characteristics

MLA

Thierry Poiroux, et al. “Considerations for Efficient Contact Resistivity Reduction via Fermi Level Depinning - Impact of MIS Contacts on 10nm Node NMOSFET DC Characteristics.” 2015 Symposium on VLSI Technology (VLSI Technology), June 2015. EBSCOhost, https://doi.org/10.1109/vlsit.2015.7223710.

APA

Thierry Poiroux, Perrine Batude, O. Rozeau, J. Borrel, M. Vinet, Louis Hutin, & Fabrice Nemouchi. (2015). Considerations for efficient contact resistivity reduction via Fermi Level depinning - impact of MIS contacts on 10nm node nMOSFET DC characteristics. 2015 Symposium on VLSI Technology (VLSI Technology). https://doi.org/10.1109/vlsit.2015.7223710

Chicago

Thierry Poiroux, Perrine Batude, O. Rozeau, J. Borrel, M. Vinet, Louis Hutin, and Fabrice Nemouchi. 2015. “Considerations for Efficient Contact Resistivity Reduction via Fermi Level Depinning - Impact of MIS Contacts on 10nm Node NMOSFET DC Characteristics.” 2015 Symposium on VLSI Technology (VLSI Technology), June. doi:10.1109/vlsit.2015.7223710.