A 1.8-Gb/s Burst-Mode Clock and Data Recovery Circuit with a 1/4-Rate Clock Technique

In this paper, a burst-mode clock and data recovery (CDR) circuit using a 1/4-rate clock technique is realized for optical communication system. The CDR circuit contains a phase detector and a muxed-oscillator to control the phase of the clocks. In-lock operation is accomplished on the first data transition, and after the first data the clocks are in phase for all data until the data transition is over. The CDR circuit is implemented with 0.18-/spl mu/m CMOS technology. The experimental results show that the proposed CDR circuit recover the incoming 1.8-Gb/s data.