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(Invited) GeSn Technology: Impact of Sn on Ge CMOS Applications

Authors :
Roger Loo
Kristiaan Temst
M. Adachi
Shigeaki Zaima
Jelle Demeulemeester
Marika Nakamura
T. Clarysse
Federica Gencarelli
Osamu Nakatsuka
Shotaro Takeuchi
Matty Caymax
André Vantomme
Yosuke Shimura
Benjamin Vincent
Source :
ECS Transactions. 41:231-238
Publication Year :
2011
Publisher :
The Electrochemical Society, 2011.

Abstract

In this paper, we reports our recent studies of the electrical and crystalline properties of heteroepitaxial Ge1-xSnx layers with various Sn content of 0~25%. We examined Ga-doping in strained Ge1-xSnx layers for developing source/drain stressor in CMOS applications and investigated the effect of Sn on the doping profile. The impact of Sn on carrier properties has been also studied with the Hall measurement of Ge1-xSnx/SOI structures. Also, we achieved the epitaxial growth of Ge1-xSnx layers with a Sn content as high as 25% on InP considering misfit between the epitaxial layer and substrate.

Details

ISSN :
19386737 and 19385862
Volume :
41
Database :
OpenAIRE
Journal :
ECS Transactions
Accession number :
edsair.doi...........8d4e6cfec3bc5a8f129976c83258173a
Full Text :
https://doi.org/10.1149/1.3633303